adder subtracter

基本解释

A logic element designed to act as either an adder or a subtracter in accordance with the control signal applied to it.
根据供给它的控制信号，或起加法器作用或起减法器作用的一种逻辑元件。
The subtracter (230) calculates the difference between the output of the adder (250) and the quantized value of the output of the adder (250) to determine the quantization error.
减法器（230）计算加法器（250）的输出和加法器（250）的输出的量化值之间的差以便确定量化误差。
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