bus transceiver

基本解释

The problems of backplane bus design, such as the driver, timing and signal integrate, have solved by using the GTL transceivers, phase adjustment of the clock and combined match techniques.
采用新型的GTL总线收发器、时钟相位调节和组合式匹配等技术措施，解决了总线设计的驱动、时序和信号完整性问题。
The memory system of dual channel A/D automatic acquisition is studied in this paper. Using transceivers and gating controllers, the data bus and address bus of RAM are respectively controlled.
本文研究了双通道A/D自动采集存储系统，利用数据收发器及数据选通控制器分别控制RAM的数据线及地址控制线。