buffer lookaside

基本解释

The use of large pages can also improve performance by reducing the number of translation lookaside buffer (TLB) misses.
大内存页的使用还可以通过减少变换索引缓冲（translation lookaside buffer, TLB）的失败次数来提高性能。
To speed up address translation, there is a processor-on-a-chip (PoC) cache and associated logic called translation lookaside buffer (TLB).
为了加快地址转换，架构中有一个 processor-on-a-chip (PoC) 缓存和相关的转换后备缓冲器 (TLB) 逻辑。
The profiling table provides the percentage and number of samples collected for specified processor events such as the number of cache line misses, Transition Lookaside Buffer (TLB) misses, and so on.
评测表提供为特定的处理器事件收集的采样的百分数或数量，比如高速缓存线路故障的数量、传输后备缓存( TLB )故障的数量，等等。